3.3.2 ROM Addressing ...................................................................................... 3-51
[1] Immediate Addressing .............................................................................. 3-51
[2] Table Data Addressing ............................................................................. 3-51
[3] Program Code Addressing ....................................................................... 3-53
[4] ROM Window Addressing......................................................................... 3-55
Chapter 4 CPU Control Functions
4.1
Standby Function ........................................................................................... 4-1
4.1.1 Standby Control Register (SBYCON) ......................................................... 4-3
4.1.2 Operation in Each Standby Mode............................................................... 4-4
[1] HALT Mode................................................................................................. 4-4
[2] STOP Mode ................................................................................................ 4-5
4.2
Reset Function............................................................................................... 4-6
Chapter 5 Memory Control Functions
5.1
5.2
ROM Window Function .................................................................................. 5-1
READY Function............................................................................................ 5-3
Chapter 6 Port Functions
6.1 Hardware Configuration of Each Port ............................................................ 6-1
6.1.1 Configuration of Type A (P0_0–P0_7, P1_0–P1_7, P12_0)....................... 6-4
6.1.2 Configuration of Type B
(P2_0–P2_7, P3_0–P3_3, P7_4–P7_7, P8_0–P8_7, P10_0–P10_4) ....... 6-5
6.1.3 Configuration of Type C
(P3_4–P3_7, P4_0–P4_7, P5_0–P5_7, P6_0–P6_7, P7_2, P7_3,
P9_0–P9_7, P10_5–P10_7, P11_0–P11_3) .............................................. 6-6
6.1.4 Configuration of Type D (P7_0, P7_1, P11_4–P11_7)............................... 6-7
6.1.5 Configuration of Type E (P12_1) ................................................................ 6-7
6.2
Port Control Registers ................................................................................... 6-8
6.2.1 Port Data Register (Pn: n = 0–12) ............................................................. 6-8
6.2.2 Port Mode Register (PnIO: n = 0–12) ........................................................ 6-8
6.2.3 Port Secondary Function Control Register (PnSF: n = 2–10).................... 6-8
6.3
Port 0 (P0) ................................................................................................... 6-11
Port 1 (P1) ................................................................................................... 6-12
Port 2 (P2) ................................................................................................... 6-13
Port 3 (P3) ................................................................................................... 6-15
Port 4 (P4) ................................................................................................... 6-17
6.4
6.5
6.6
6.7
Contents-3