PEDL66517-03
1
Semiconductor
ML66517 Family
(3) Serial port control
Master mode (Clock synchronous serial port)
(VDD = 4.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Symbol
tcyc
Condition
Min.
40
Max.
—
Unit
Cycle time
fOSC = 25 MHz
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
tSCKC
tSTMXS
tSTMXH
tSRMXS
tSRMXH
4 tcyc
2tφ – 5
5tφ – 10
13
—
—
ns
CL = 50 pF
—
—
0
—
Note: tφ = tcyc/2
tcyc
CPUCLK
TXC/RXC
tSCKC
SDOUT
(TXD)
tSTMXH
tSTMXS
SDIN
(RXD)
tSRMXS
tSRMXH
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