PEDL66517-03
1
Semiconductor
ML66517 Family
ALLOWABLE OUTPUT CURRENT
(1) ML66517/ML66Q517 (80-pin QFP)
(VDD = 4.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Pin
Symbol
IOH
Min.
—
Typ.
—
Max.
–2
Unit
“H” output pin (1 pin)
All input pins
“H” output pins
(sum total)
Sum total of all output pins
∑
—
—
–50
IOH
P3
—
—
—
—
10
5
“L” output pin (1 pin)
IOL
Other ports
Sum total of P0, P3
Sum total of P1, P2
Sum total of P7, P8, P15
60
mA
“L” output pins
(sum total)
∑
—
—
50
IOL
Sum total of P5, P6, P10,
P11, P16, P17
Sum total of all output pins
100
(2) ML66Q515/ML66514 (64-pin QFP/SDIP)
(VDD = 4.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Pin
Symbol
IOH
Min.
—
Typ.
—
Max.
–2
Unit
“H” output pin (1 pin)
All input pins
“H” output pins
(sum total)
Sum total of all output pins
∑
—
—
–20
IOH
P3
Other ports
Sum total of P0, P3
P1
—
—
—
—
10
5
“L” output pin (1 pin)
IOL
mA
50
“L” output pins
(sum total)
∑
—
—
30
60
Sum total of P5 to P8,
P11, P15, P17
IOL
Sum total of all output pins
Note: Each of the family devices has unique pattern routes for the internal power and ground. Connect
the power supply voltage to all VDD pins and the ground potential to all GND pins. If a device may
have one or more VDD or GND pins to which the power supply voltage or the ground potential is
not connected, it can not be guaranteed for normal operation.
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