欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML53612 参数 Datasheet PDF下载

ML53612图片预览
型号: ML53612
PDF下载: 下载PDF文件 查看货源
内容描述: 64通道全双工H.100 / H.110 CT总线系统接口和时间槽交换 [64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange]
分类和应用: 数字传输控制器电信集成电路电信电路
文件页数/大小: 68 页 / 643 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号ML53612的Datasheet PDF文件第58页浏览型号ML53612的Datasheet PDF文件第59页浏览型号ML53612的Datasheet PDF文件第60页浏览型号ML53612的Datasheet PDF文件第61页浏览型号ML53612的Datasheet PDF文件第63页浏览型号ML53612的Datasheet PDF文件第64页浏览型号ML53612的Datasheet PDF文件第65页浏览型号ML53612的Datasheet PDF文件第66页  
ML53612 ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––  
17. Φ (Phase Correction) results from PLL timing corrections.  
H.100. Measuring conditions:  
Data lines  
Vth (threshold voltage) = 1.4V  
Vhi (test high voltage) = 2.4V  
Vlo (test low voltage) = 0.4V  
Input signal edge rate = 1 V/nS  
Vt+ (test high voltage) = 2.0V  
Vt- (test low) = 0.6V  
Clock and Frame lines  
Data lines  
Input signal edge rate = 1 V/nS  
Vhi (test high voltage) = 2.0V  
Vlo (test low voltage) = 0.8V  
Input signal edge rate = 1 V/nS  
Vt+ (test high voltage) = 2.0V  
Vt- (test low voltage) = 0.6V  
Input signal edge rate = 1 V/nS  
H.110. Measuring conditions:  
Clock and Frame lines  
58  
Oki Semiconductor  
 复制成功!