TDA6650TT; TDA6651TT
NXP Semiconductors
5 V mixer/oscillator and low noise PLL synthesizer
Table 4.
Pin description…continued
Symbol
Pin
Description
TDA6650TT TDA6651TT
MOSCIN1
MOSCIN2
OSCGND
LOSCOUT
LOSCIN
34
35
36
37
38
5
4
3
2
1
mid band oscillator input 1
mid band oscillator input 2
oscillators ground
low band oscillator output
low band oscillator input
6.2 Pinning
1
2
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
1
2
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
HBIN1
HBIN2
MBIN
LBIN
LOSCIN
LOSCIN
LOSCOUT
OSCGND
MOSCIN2
MOSCIN1
HOSCIN2
HOSCOUT2
HOSCOUT1
HOSCIN1
IFGND
HBIN1
HBIN2
MBIN
LBIN
LOSCOUT
OSCGND
MOSCIN2
MOSCIN1
HOSCIN2
3
3
4
4
5
5
RFGND
IFFIL1
IFFIL2
BS4
RFGND
IFFIL1
IFFIL2
BS4
6
6
7
7
HOSCOUT2
HOSCOUT1
HOSCIN1
IFGND
8
8
9
9
AGC
AGC
10
11
12
13
14
15
16
17
18
19
10
11
12
13
14
15
16
17
18
19
BS3
TDA6650TT
TDA6651TT
BS3
BS2
IFOUTA
IFOUTA
BS2
BS1
IFOUTB
IFOUTB
BS1
BVS
V
CCA
V
CCA
BVS
ADC/BS5
SCL
PLLGND
PLLGND
ADC/BS5
SCL
V
CCD
V
CCD
SDA
CP
CP
SDA
AS
VT
VT
AS
XTOUT
XTAL1
n.c.
n.c.
XTOUT
XTAL1
XTAL2
XTAL2
001aac025
001aac026
Fig 2. Pin configuration TDA6650TT
Fig 3. Pin configuration TDA6651TT
7. Functional description
7.1 Mixer, Oscillator and PLL (MOPLL) functions
Bit BS1 enables the BS1 port, the low band mixer and the low band oscillator. Bit BS2
enables the BS2 port, the mid band mixer and the mid band oscillator. When both BS1
and BS2 bits are logic 0, the high band mixer and the high band oscillator are enabled.
The oscillator signal is applied to the fractional-N programmable divider. The divided
signal fdiv is fed to the phase comparator where it is compared in both phase and
frequency with the comparison frequency fcomp. This frequency is derived from the signal
present on the crystal oscillator fxtal and divided in the reference divider. There is a
fractional calculator on the chip that generates the data for the fractional divider as well as
TDA6650TT_6651TT_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 10 January 2007
6 of 54
NXP [ NXP ]
