Philips Semiconductors
Product specification
Economy Autosync Deflection Controller
(EASDC)
TDA4858
Vertical linearity error
(1)
handbook, halfpage
I
VOUT
MBG551
(µA)
+415
(2)
I
1
(3)
2
I
0
(4)
3
I
−415
V
VCAP
(1) IVOUT = IVOUT1 − IVOUT2
.
(2) 1 = IVOUT at VVCAP = 1.9 V.
I
(3) I2 = IVOUT at VVCAP = 2.6 V.
(4) I3 = IVOUT at VVCAP = 3.3 V.
I
1 – I3
Which means: I0
=
--------------
2
I
1 – I2
I2 – I3
Vertical linearity error = 1 – max -------------- or --------------
I0
I0
Fig.16 Definition of vertical linearity error.
Usage of superimposed waveforms
VPOS
VAMP
VPOS
VAMP
handbook, halfpage
handbook, halfpage
EWPAR
EWWID
EWPAR
EWWID
VSCOR
19
EWTRP
20
17, 18, 21, 32
17, 18, 21, 32
5 V DC
5 V DC
5 V
5 V
120 mV (p-p)
120 mV (p-p)
MBG556
MBG557
a. VSCOR (pin 19).
b. EWTRP (pin 20).
Fig.17 Superimposed waveforms at pins 19 and 20 with pins 17, 18, 21 or 32.
31
1997 Oct 27
NXP [ NXP ]
