Philips Semiconductors
Product specification
Economy Autosync Deflection Controller
(EASDC)
TDA4858
CHARACTERISTICS
V
CC
= 12 V; T
amb
= 25
°C;
peripheral components in accordance with Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Horizontal sync separator
I
NPUT CHARACTERISTICS FOR DC
-
COUPLED
TTL
SIGNALS
[HSYNC (
PIN
15)]
V
DC(HSYNC)
t
r(HSYNC)
t
f(HSYNC)
t
W(HSYNC)
I
DC(HSYNC)
sync input signal voltage
slicing voltage level
rise time of sync pulse
fall time of sync pulse
minimum width of sync pulse
input current
V
HSYNC
= 0.8 V
V
HSYNC
= 5.5 V
V
AC(HSYNC)
sync amplitude of video input
signal voltage
slicing voltage level
(measured from top sync)
V
clamp(HSYNC)
I
C(HSYNC)
t
HSYNC(min)
R
S(max)
r
diff(HSYNC)
top sync clamping voltage level
charge current for coupling
capacitor
minimum width of sync pulse
maximum source resistance
differential input resistance
duty factor = 7%
during sync
f
H
<
45 kHz
f
H
>
45 kHz
V
HSYNC
>
V
clamp(HSYNC)
source resistance
R
S
= 50
Ω
1.7
1.2
10
10
0.7
−
−
−
90
1.1
1.7
0.7
−
−
−
−
0.3
−
1.4
−
−
−
−
−
300
120
1.28
2.4
−
−
80
−
−
−
−
1.6
500
500
−
−200
10
−
150
1.5
3.4
−
1500
−
V
V
ns
ns
µs
µA
µA
mV
mV
V
µA
µs
Ω
Ω
I
NPUT CHARACTERISTICS FOR
AC-
COUPLED VIDEO SIGNALS
(
SYNC
-
ON
-
VIDEO
,
NEGATIVE SYNC POLARITY
)
Automatic polarity correction for horizontal sync
t
P
(
H
)
------------
-
t
H
t
P(H)
t
int(V)
horizontal sync pulse width
related to t
H
delay time for changing polarity
20
25
1.8
%
%
ms
µs
µs
µs
Vertical sync integrator
integration time for generation
of a vertical trigger pulse
f
H
= 31.45 kHz;
I
HREF
= 1.052 mA
f
H
= 64 kHz;
I
HREF
= 2.141 mA
f
H
= 100 kHz;
I
HREF
= 3.345 mA
Vertical sync slicer (DC-coupled, TTL compatible) [VSYNC (pin 14)]
V
VSYNC
I
VSYNC
sync input signal voltage
slicing voltage level
input current
0 V
<
V
SYNC
<
5.5 V
1.7
1.2
−
−
1.4
−
−
1.6
±10
V
V
µA
7
3.9
2.5
10
5.7
3.8
13
6.5
4.5
1997 Oct 27
13
PHILIPS [ NXP SEMICONDUCTORS ]
