NXP Semiconductors
PCA9554/PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
7. Application design-in information
V
DD
(5 V)
10 kΩ
10 kΩ
10 kΩ
10 kΩ
2 kΩ
V
DD
MASTER
CONTROLLER
SCL
SDA
V
DD
PCA9554
SCL
SDA
IO0
IO1
IO2
IO3
IO4
SUBSYSTEM 1
(e.g., temp. sensor)
INT
RESET
SUBSYSTEM 2
(e.g., counter)
A
enable
controlled switch
(e.g., CBT device)
B
INT
V
SS
INT
IO5
IO6
IO7
A2
A1
A0
V
SS
ALARM
SUBSYSTEM 3
(e.g., alarm system)
V
DD
002aac496
Device address configured as 0100 100X for this example.
IO0, IO1, IO2 configured as outputs.
IO3, IO4, IO5 configured as inputs.
IO6 and IO7 are not used and must be configured as outputs.
Fig 16. Typical application
8. Limiting values
Table 8.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DD
I
I
V
I/O
I
O(IOn)
I
DD
I
SS
P
tot
T
stg
T
amb
Parameter
supply voltage
input current
voltage on an input/output pin
output current on pin IOn
supply current
ground supply current
total power dissipation
storage temperature
ambient temperature
operating
Conditions
Min
−0.5
-
V
SS
−
0.5
-
-
-
-
−65
−40
Max
+6.0
±20
5.5
±50
85
100
200
+150
+85
Unit
V
mA
V
mA
mA
mA
mW
°C
°C
PCA9554_9554A_7
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 07 — 13 November 2006
12 of 30
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