P5CD016/021/041/051 and P5Cx081
NXP Semiconductors
Secure dual interface and contact PKI smart card controller
Secure_MX51 processor core has been further optimized over the existing version in
0.14 μm CMOS technology. Therefore, these products now offer improved CPU speed,
leading to shorter overall transaction times. At the same time, the FameXE cryptography
coprocessor has been optimized for even lower power operation, while keeping its
performance at the same industry-leading level.
The availability of both contact interface and contactless or S2C interface enable the easy
implementation of native or open platform and multi-application operating systems in
market segments such as banking, E-passports, ID cards, Health cards, secure access,
Java cards as well as Trusted Platform Modules (TPM).
1.3 Naming conventions
Table 1.
Naming conventions
P5xyzzz SmartMX platform
x
y
Type of category:
C = PKI controller + triple-DES coprocessor + AES coprocessor on selected products
Interface options:
C = contact interface - ISO/IEC 7816
D = dual interface - ISO/IEC 7816 + ISO/IEC 14443 contactless interface
N = ISO/IEC 7816 + S2C interface for NFC
zzz
Amount of non-volatile memory in KB, increasing count for further product options
1.4 Cryptographic hardware coprocessors
1.4.1 FameXE coprocessor
The approved and modular FameXE architecture supports the trend of increasing RSA
keys with faster execution speeds as well as Elliptic Curve Cryptography (ECC) based on
GF(p) or GF(2n) at best performance. FameXE supports RSA with an operand length of
up to 8-kbit (up to 4-kbit with intermediate storage in RAM only).
The now further reduced power-consumption FameXE PKI coprocessor supports 192-bit
ECC key length that offers the same level of security as 2048-bit RSA. An ECC GF(2n)
based signature, using a 163-bit key can be executed in less than 30 ms providing a
security level comparable to 1024-bit RSA. The operand size for ECC, supported by
FameXE, is only limited by the 2.5 KB size of the FXRAM. FameXE operates at up to
72 MHz, is easy to use and the flexible interface provides programmers with the freedom
to implement their own cryptography solutions. A secure and CC EAL5+ certified crypto
library providing a large range of required functions will be available for all devices in order
to support customers in implementing public key-based solutions.
1.4.2 Triple-DES coprocessor
The DES widely used for symmetric encryption is supported by a dedicated, high
performance, highly attack-resistant hardware coprocessor. Single DES and triple-DES,
based on two or three DES keys, can be executed within less than 40 μs. Relevant
standards (ISO/IEC, ANSI, FIPS) and Message Authentication Code (MAC) are fully
supported. A secure crypto library element for DES is available.
P5CD016_021_041_51_Cx081_FAM_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC
Rev. 3.2 — 14 March 2011
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