NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Value
Qty Description
Part number
Manufacturer [1]
Component/pin
LDO, VGEN1, 2, 3, 4, 5, 6
4.7 µF
2.2 µF
1.0 µF
1
1
1
10 V X7S 0603
10 V X7S 0402
10 V X7S 0402
GRM188C71A475KE11
GRM155C71A225KE11
GRM155C71A105KE11
Murata
Murata
Murata
VGEN2, 4 output
capacitors
VGEN1, 3, 5, 6 output
capacitors
VGEN1, 2, 3, 4, 5, 6
input capacitors
Miscellaneous
1.0 µF
1
10 V X7S 0402
GRM155C71A105KE11
Murata
VCORE, VCOREDIG,
VREFDDR,
VINREFDDR, VIN
capacitors
0.22 µF
0.47 µF
0.1 µF
1
1
1
10 V X7R 0402
10 V X7R 0402
10 V X7S 0201
GRM155R71A224KE01
GRM155R71A474KE01
GRM033C71A104KE14
Murata
Murata
Murata
VCOREREF output
capacitor
VSNVS output
capacitor
VHALF,
VINREFDDR,VDDIO,
LICELL capacitors
100 kΩ
4.7 kΩ
2
2
RES MF 100 k 1/16 W 1 % RC0402FR-07100KL
0402
Yageo America
Yageo America
Pull-up resistors
RES MF 4.70 K 1/20 W 1 % RC0201FR-074K7L
0201
I2C pull-up resistors
[1] NXP does not assume liability, endorse, or warrant components from external manufacturers referenced in circuit drawings or tables. While NXP offers
component recommendations in this configuration, it is the customer's responsibility to validate their application.
12 PF4210 layout guidelines
12.1 General board recommendations
• It is recommended to use an eight-layer board stack-up arranged as follows:
– High current signal
– GND
– Signal
– Power
– Power
– Signal
– GND
– High current signal
• Allocate top and bottom PCB layers for power routing (high current signals), copper-
pour the unused area.
• Use internal layers sandwiched between two GND planes for the signal routing.
PF4210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
127 / 137
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