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LPC54616J512BD100 参数 Datasheet PDF下载

LPC54616J512BD100图片预览
型号: LPC54616J512BD100
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 169 页 / 3528 K
品牌: NXP [ NXP ]
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LPC546xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
Table 60. Revision history …continued  
Document ID  
LPC546xx v.1.5  
Modifications:  
Release date Data sheet status  
20170331 Product data sheet  
Change notice Supersedes  
-
LPC546xx v.1.4  
Updated Table 51 “Dynamic characteristics: SD/MMC and SDIO”. The max clock  
frequency is 50 MHz.  
Updated Section 7.18.2 “SD/MMC card interface”: Supports up to a maximum of 50  
MHz of interface frequency.  
Updated Table 41 “Dynamic characteristic: I2C-bus pins[1]”  
Updated Figure 28 “I2S-bus timing (master)” and Figure 29 “I2S-bus timing (slave)”.  
Updated Table 2 “Ordering options”. Parts LPC54618J512ET180 and  
LPC54618J512BD208 have Classic CAN.  
Added Section 11.4 “Wake-up process”.  
LPC546xx v.1.4  
Modifications:  
20170307  
Product data sheet  
-
LPC5460x v.1.3  
Changed data sheet title to LPC546xx.  
Updated Table 16 “Static characteristics: Power consumption in deep-sleep and deep  
power-down modes” and Table 17 “Static characteristics: Power consumption in  
deep-sleep and deep power-down modes”.  
LPC5460x v.1.3  
Modifications:  
20170224  
Product data sheet  
-
LPC5460x v.1.2  
Removed S parts. Data sheet title renamed to LPC5460x.  
Removed AES-256 engine and SHA references throughout the document.  
Security peripherals renamed to Security features.  
Updated Section 4 “Marking”.  
Updated Section 5 “Block diagram”.  
Updated Figure 6 “LPC546xx Memory mapping”.  
Updated Table 20 “Typical AHB/APB peripheral power consumption [3][4][5]”.  
LPC5460x v.1.2  
Modifications:  
20170206  
Product data sheet  
-
LPC5460x v.1.1  
Updated address range details and description of the address range: 0x8000 0000 to  
0xDFFF FFFF: See Table 7 “Memory usage and details”: Static memory chip select:  
was 0x9000 0000 - 0x93 FFFF, now, 0x9000 0000 – 0x93FF FFFF.  
Updated Figure 8 “LPC5460x clock generation”.  
Updated Power control in Section 2 “Features and benefits”: Ultra-low power Micro-tick  
Timer, running from the Watchdog oscillator that can be used to wake up the device  
from low power modes.  
Updated Table 4 “Pin description”: PIO0_26, USB0_IDVALUE, Type is Input (I).  
Updated Section 7.18.1.1 “Features”.  
Updated Table 31 “Dynamic characteristics of the PLL0[1]”: Input frequency, Fin, Max  
value is 25 MHZ.  
LPC5460x v.1.1  
20170124  
Product data sheet  
-
LPC5460x v.1  
LPC546xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 2.5 — 20 June 2018  
164 of 169  
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