LPC2210/2220
NXP Semiconductors
16/32-bit ARM microcontrollers
Table 9.
PINSEL2 bits
23
Pin function select register 2 (PINSEL2 - 0xE002 C014) …continued
Description
Reset value
Controls whether P3.0/A0 is a port pin (0) or an address line (1).
1 if BOOT1:0 = 00
at RESET = 0,
0 otherwise
24
Controls whether P3.1/A1 is a port pin (0) or an address line (1).
BOOT1 during
reset
27:25
Controls the number of pins among P3.23/A23/XCLK and P3[22:2]/A2[22:2] that
are address lines:
000 if
BOOT1:0 = 11 at
reset, 111
otherwise
000 = None
100 = A11 to A2 are address lines.
101 = A15 to A2 are address lines.
001 = A3 to A2 are address
lines.
010 = A5 to A2 are address
lines.
110 = A19 to A2 are address lines.
111 = A23 to A2 are address lines.
011 = A7 to A2 are address
lines.
31:28
reserved
6.9 External memory controller
The external static memory controller is a module which provides an interface between
the system bus and external (off-chip) memory devices. It provides support for up to four
independently configurable memory banks (16 MB each with byte lane enable control)
simultaneously. Each memory bank is capable of supporting SRAM, ROM, flash EPROM,
burst ROM memory, or some external I/O devices.
Each memory bank may be 8-bit, 16-bit, or 32-bit wide.
6.10 General purpose parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
6.10.1 Features
• Direction control of individual bits.
• Separate control of output set and clear.
• All I/O default to inputs after reset.
6.11 10-bit ADC
The LPC2210/2220 each contain a single 10-bit successive approximation ADC with eight
multiplexed channels.
6.11.1 Features
• Measurement range of 0 V to 3 V.
• Capable of performing more than 400000 10-bit samples per second.
• Burst conversion mode for single or multiple inputs.
LPC2210_2220_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 11 December 2008
23 of 50
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