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LPC2220FBD144-S 参数 Datasheet PDF下载

LPC2220FBD144-S图片预览
型号: LPC2220FBD144-S
PDF下载: 下载PDF文件 查看货源
内容描述: [16/32-bit ARM microcontrollers; flashless, with 10-bit ADC and external memory interface - ADCs: 8-ch 10-bit ; Category: ARM7TDMI-S (TM) Core ; Clock type: N/A ; External interrupt: 3 ; Function: 16/32-bit uController ; I/O pins: 112 ; Memory size: - kBits; Memory type: ROMless ; Number of pins: 144 ; Operating frequency: 0~75 MHz; Operating temperature: -40 to +85 Cel; Power supply: 1.8V (CPU)3.3V (I/O) ; PWMs: 6-ch PWM ; RAM: 64KB bytes; Reset active: Low ; Serial interface: 2xUARTI2C1xSPI 1xSPI/SSP ; Series: LPC2200 family ; Special features: JTAG; ETM ; System frequency: 0~60 MHz; Timers: ]
分类和应用: 存储微控制器
文件页数/大小: 50 页 / 259 K
品牌: NXP [ NXP ]
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LPC2210/2220  
NXP Semiconductors  
16/32-bit ARM microcontrollers  
Table 4.  
Symbol  
Pin description …continued  
Pin (LQFP)  
Pin (TFBGA) Type  
Description  
P0.28/AIN1/  
CAP0.2/MAT0.2  
25[4]  
J1[4]  
L1[4]  
L2[4]  
I
AIN1 — ADC, input 1. This analog input is always connected  
to its pin.  
I
CAP0.2 — Capture input for Timer 0, channel 2.  
MAT0.2 — Match output for Timer 0, channel 2.  
O
I
P0.29/AIN2/  
CAP0.3/MAT0.3  
32[4]  
AIN2 — ADC, input 2. This analog input is always connected  
to its pin.  
I
CAP0.3 — Capture input for Timer 0, Channel 3.  
MAT0.3 — Match output for Timer 0, channel 3.  
O
I
P0.30/AIN3/  
33[4]  
AIN3 — ADC, input 3. This analog input is always connected  
EINT3/CAP0.0  
to its pin.  
I
EINT3 — External interrupt 3 input.  
I
CAP0.0 — Capture input for Timer 0, channel 0.  
P1.0 to P1.31  
I/O  
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual  
direction controls for each bit. The operation of port 1 pins  
depends upon the pin function selected via the Pin Connect  
Block.  
Pins 0 through 15 of port 1 are not available.  
CS0 — LOW-active Chip Select 0 signal.  
P1.0/CS0  
P1.1/OE  
91[5]  
G11[5]  
O
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)  
OE — LOW-active Output Enable signal.  
90[5]  
34[5]  
G13[5]  
L3[5]  
O
O
P1.16/  
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with  
TRACEPKT0  
internal pull-up.  
P1.17/  
TRACEPKT1  
24[5]  
15[5]  
7[5]  
H4[5]  
F2[5]  
O
O
O
O
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with  
internal pull-up.  
P1.18/  
TRACEPKT2  
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with  
internal pull-up.  
P1.19/  
TRACEPKT3  
D2[5]  
D12[5]  
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with  
internal pull-up.  
P1.20/  
102[5]  
TRACESYNC — Trace Synchronization. Standard I/O port  
TRACESYNC  
with internal pull-up.  
Note: LOW on this pin while RESET is LOW, enables pins  
P1[25:16] to operate as Trace port after reset.  
P1.21/  
PIPESTAT0  
95[5]  
86[5]  
82[5]  
70[5]  
F11[5]  
H11[5]  
J11[5]  
L11[5]  
K8[5]  
O
O
O
O
I
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with  
internal pull-up.  
P1.22/  
PIPESTAT1  
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with  
internal pull-up.  
P1.23/  
PIPESTAT2  
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with  
internal pull-up.  
P1.24/  
TRACECLK  
P1.25/EXTIN0 60[5]  
TRACECLK — Trace Clock. Standard I/O port with internal  
pull-up.  
EXTIN0 — External Trigger Input. Standard I/O with internal  
pull-up.  
LPC2210_2220_6  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 06 — 11 December 2008  
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