NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
7.7.12.2 DSP_CFG_U1 - DSP user configuration #1 register (address 40h)
The DSP user configuration register #1 is a user programmable read/write register that
contains DSP-specific configuration information. This register is included in the read/write
array error detection.
Changes to this register reset the DSP data path. The contents of the SNSDATA_x
registers are not guaranteed until the DSP has completed initialization as specified in
Table 102. Reads of the SNSDATA_x registers and sensor data requests should be
prevented during this time.
Table 62.ꢀDSP_CFG_U1 - DSP user configuration #1 register (address 40h) bit allocation
Bit
7
6
5
4
3
reserved
0
2
reserved
0
1
0
Symbol
Factory default
Access
LPF[3:0]
USER_RANGE[1]
USER_RANGE[0]
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 63.ꢀLow-pass filter selection bits (LPF[3:0])
LPF[3]
LPF[2]
LPF[1]
LPF[0]
Low Pass Filter Type
0
0
0
0
0
0
0
1
1
0
0
0
1
1
1
1
0
x
0
0
1
0
0
1
1
0
x
0
1
0
0
1
0
1
0
x
370 Hz, 2-Pole
400 Hz, 3 Pole
800 Hz, 4-Pole
1000 Hz, 4-Pole
reserved
reserved
reserved
reserved
reserved
Table 64.ꢀUser range selection bits (USER_RANGE[1:0])
USER_RANGE[1]
USER_RANGE[0]
Absolute Pressure Range
Notes
0
0
1
1
0
1
0
1
reserved
reserved
reserved
reserved
For Internal use Only
For Internal use Only
For Internal use Only
For Internal use Only
7.7.12.3 DSP_CFG_U4 - DSP user configuration #4 register (address 43h)
The DSP user configuration register #4 is a user programmable read/write register that
contains DSP-specific configuration information. This register is included in the read/write
array error detection.
Table 65.ꢀDSP_CFG_U4 - DSP user configuration #4 register (address 43h) bit allocation
Bit
7
reserved
0
6
reserved
0
5
reserved
0
4
reserved
0
3
reserved
0
2
INT_OUT
0
1
reserved
0
0
reserved
0
Symbol
Reset
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FXPS7115D4
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© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
42 / 72
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