NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
SDA
SCL
START
ACK
ACK
STOP
from slave
from receiver
aaa-029748
Figure 16.ꢀI2C byte transmissions
7.4.4 I2C acknowledge and not acknowledge transmissions
Each byte must be followed by an acknowledge bit (ACK) from the receiver. For an ACK,
the transmitter releases SDA during the acknowledge clock pulse and the receiver pulls
SDA low during the high portion of the clock pulse. Set up and hold times as specified in
Table 102 must also be taken into account.
For a not acknowledge bit (NACK), SDA remains high during the entire acknowledge
clock pulse. Five conditions lead to a NACK:
1. No receiver is present on the bus with the transmitted address.
2. The addressed receiver is unable to receive or transmit because it is performing some
real-time function and is not ready to start communication with the master.
3. The receiver receives unrecognized data or commands.
4. The receiver cannot receive any more data bytes.
5. The master-receiver signals the end of the transfer to the slave transmitter.
Following a NACK, the master can transmit either a STOP to terminate the transfer, or a
repeated START to initiate a new transfer.
An example ACK and NACK are shown in Figure 17.
SDA
SCL
ACK
ACK
ninth clock pulse
ninth clock pulse
aaa-029749
Figure 17.ꢀI2C acknowledge and not acknowledge transmission
7.4.5 I2C stop condition
A bus operation is always terminated with a stop condition (STOP) from the master.
A STOP is defined as a low to high transition on SDA while SCL is high as shown in
Figure 18. After the STOP has been transmitted by the master, the bus is considered
free. Timing for the stop condition is specified in Table 102.
FXPS7115D4
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© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
15 / 72
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