NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
Effect
Bus
Opcode Operand Cycles
Address
on CCR
Source Form
Operation
Description
[1]
Mode
V H I N Z C
PC ← (PC) + n (n =
1, 2, or 3)
BD dd
CD hh ll
DD ee ff
ED ff
5
6
6
5
5
JSR opr8a
JSR opr16a
JSR oprx16,X
JSR oprx8,X
JSR ,X
DIR
EXT
Push (PCL); SP ←
(SP) – 0x0001
Jump to
Subroutine
– – – – – – IX2
Push (PCH); SP ←
(SP) – 0x0001
FD
IX1
IX
PC ← Unconditional
Address
LDA #opr8i
LDA opr8a
IMM
DIR
EXT
A6 ii
B6 dd
2
3
4
4
3
3
5
4
LDA opr16a
LDA oprx16,X
LDA oprx8,X
LDA ,X
C6 hh ll
D6 ee ff
E6 ff
Load
IX2
0 – – Þ Þ –
IX1
Accumulator from A ← (M)
Memory
IX
F6 ꢁ
LDA oprx16,SP
LDA oprx8,SP
SP2
SP1
9ED6 ee ff
9EE6 ff
LDHX #opr16i
LDHX opr8a
LDHX opr16a
LDHX ,X
IMM
45 jj kk
55 dd
3
4
5
5
6
5
5
DIR
Load Index
Register
EXT
32 hh ll
H:X ← (M:M +
0x0001)
0 – – Þ Þ – IX
9EAE ꢁ
9EBE ee ff
9ECE ff
9EFE ff
(H:X) from
Memory
LDHX oprx16,X
LDHX oprx8,X
LDHX oprx8,SP
IX2
IX1
SP1
LDX #opr8i
LDX opr8a
IMM
DIR
EXT
AE ii
BE dd
2
3
4
4
3
3
5
4
LDX opr16a
LDX oprx16,X
LDX oprx8,X
LDX ,X
CE hh ll
DE ee ff
EE ff
Load X (Index
Register Low)
from Memory
IX2
0 – – Þ Þ –
IX1
X ← (M)
IX
FE ꢁ
LDX oprx16,SP
LDX oprx8,SP
SP2
SP1
9EDE ee ff
9EEE ff
LSL opr8a
LSLA
DIR
INH
38 dd
48 ꢁ
5
1
1
5
4
6
0
C
LSLX
Logical Shift Left
(Same as ASL)
INH
Þ – – Þ Þ Þ
IX1
58 ꢁ
b7
b0
LSL oprx8,X
LSL ,X
68 ff
aaa-028008
IX
78 ꢁ
LSL oprx8,SP
SP1
9E68 ff
LSR opr8a
LSRA
DIR
INH
34 dd
44 ꢁ
5
1
1
5
4
6
0
C
LSRX
INH
Þ – – 0 Þ Þ
IX1
54 ꢁ
Logical Shift
Right
b7
b0
LSR oprx8,X
LSR ,X
64 ff
aaa-028009
IX
74 ꢁ
LSR oprx8,SP
SP1
9E64 ff
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
78 / 183