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F87EHHD 参数 Datasheet PDF下载

F87EHHD图片预览
型号: F87EHHD
PDF下载: 下载PDF文件 查看货源
内容描述: [FXTH87E, Family of Tire Pressure Monitor Sensors]
分类和应用:
文件页数/大小: 183 页 / 1700 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
FXTH87E  
FXTH87E, Family of Tire Pressure Monitor Sensors  
bytes into a buffer where they remain until a second byte is read ($1808 or $1809). This  
allows coherent 16-bit reads in either order. The coherency mechanism is automatically  
restarted by an MCU reset, exit of STOP1, or a write to the PMCT register at address  
$180B bits 7 = 1, or bit 5 = 0.  
Once enabled, the FRC continues to increment (and subsequently rolls over) in RUN,  
STOP4, STOP3, and STOP1 modes, unless halted as defined below.  
13 Periodic Wakeup Timer  
The periodic wakeup timer (PWU) generates a periodic interrupt to wakeup the MCU  
from any of the STOP modes. It also has an optional periodic reset to restart the MCU.  
It is driven by the LFO oscillator in the RTI module which generates a clock at a nominal  
one millisecond interval. The LFO and the wakeup timer are always active and cannot  
be powered off by any software control. The control bits are set so that there is either a  
periodic wakeup, a periodic reset, or both a wakeup interrupt and a periodic reset. No  
combination of control bits will disable both the wakeup interrupt and the periodic reset.  
In addition, there is no hardware control that can mask a wakeup interrupt once it is  
generated by the PWU.  
13.1 Block diagram  
The block diagram of the wakeup timer is shown in Figure 25. This consists of a  
programmable prescaler with 64 steps that can be used to adjust for variations in the  
value of the LFO period. Finally there are two cascaded programmable 6-bit dividers to  
set wakeup and/or reset time intervals.  
6-BIT  
PERIODIC  
RESET  
6-BIT  
WAKEUP  
DIVIDER  
WCLK  
RCLK  
PROGRAMMBLE  
PRESCALER  
LFO  
DIVIDER  
TRE  
PRST  
PRF  
TRO  
PRFAK  
WUFAK  
CONTROL  
LOGIC  
WUKI  
WUF  
WDIV[5:0]  
WUT[5:0]  
PRST[5:0]  
aaa-028018  
Figure 25.ꢀWakeup timer block diagram  
The wakeup divider (PWUDIV) register selects a division of the incoming 1 ms clock  
to generate a wakeup clock, WCLK. The WCLK frequency can be calibrated against  
the more precise external oscillator using the TPMS_LFOCOL firmware subroutine as  
described in Section 16 "Firmware". This subroutine turns on the RFM crystal oscillator  
and feeds a 500 kHz clock to the TPM1 for one cycle of the LFO. The measured time is  
used to calculate the correct value for the WDIV[5:0] bits for a WCLK period of 1 second.  
The TPMS_LFOCOL subroutine cannot be used while the RFM is transmitting or the  
TPM1 is being used for another task.  
The wakeup time register (PWUSC0) selects the number of WCLK pulses that are  
needed to generate a wakeup interrupt to the MCU. The periodic reset register  
(PWUSC1) selects the number of wakeup pulses that are needed to generate a periodic  
reset of the MCU. Both the wakeup time counter and the periodic reset timer are  
incrementing counters that generate their interrupt or reset when the desired count is  
FXTH87ERM  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Reference manual  
Rev. 5.0 — 4 February 2019  
107 / 183  
 
 
 
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