NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
Reset
Firmware
initialization
after a reset
Firmware
configuration of
device
TRE bit cleared
and TR trim bits
enabled to be
written
Read temperature
using
TPMS_COMP_TEMPERATURE
firmware
Load TR trim
bits from
FLASH
Temp
Yes
>T
?
Execute user's
TPMS program
REARMH
No
Check
temperature?
Temp
Yes
Yes
<T
?
REARML
No
No
Set TRE bit
Delay
Yes
TRO
bit set
Enter STOP1
mode
No
Clear TRE bit
Yes
Wake up from
STOP1 mode
TRO reset by
TR module
No
aaa-028017
Figure 24.ꢀFlowchart for using TR module
12.8 Free-Running Counter (FRC)
The Free-Running Counter (FRC) is a single channel up-counter, scaled to 2x of the
LFO (refer to the product data sheet for tolerances of fLFO), that supports enable, halt,
and clear functions. While the MCU is in the RUN mode, the FRC is controlled by first
writing a 1 to bit 0 of the PMCT register at address $180B, then by writing the defined
values to bits 7 and 5 of the same register. While the PMCT bit 0 is equal to 1, the 16-
bit counter value is available by reading addresses $1808 FRC_TIMER[7:0] and $1809
FRC_TIMER[15:8].
The two read-only FRC_TIMER registers contain the high and low bytes of the value in
the free-running counter. Reading either FRC_TIMER byte latches the contents of both
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
106 / 183
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