Nano100(A)
4.2 Nano120 Block Diagram
LXT
LIRC
P
L
L
FLASH
EBI
Cortex-M0
32MHz
DMA
CLK_CTL
HXT
64/32KB
HIRC
1.8V LDO
(input: 1.8 ~ 3.6V)
POR(1.8V)
BOD(1.7/2.0/2.5 V)
ISP 4KB
GPIO
SRAM
A,B,C,D,E,F
16/8KB
12-b ADC
I2C 1
PWM 1
Timer 2/3
UART 1
SPI 1
I2C 0
12-b DAC
PWM 0
1.5/2.5V REF
Timer 0/1
UART 0
SPI 0
Touch key
USB -512B
TEMP sensor
USB PHY
I2S
SPI 2
SC 0
SC 1
RTC
WDT
Peripherals with PDMA
Peripherals with wakeup
NOTE: BOD can wakeup system.
External interrupts, included in GPIO, can wakeup system, too.
Figure 4-2 NuMicroTM Nano120 Block Diagram
Mar 31, 2015
Page 52 of 95
Revision V1.00