Nano100(A)
(WFE) instructions, or return from interrupt sleep-on-exit feature
NVIC:
32 external interrupt inputs, each with four levels of priority
Dedicated Non-Maskable Interrupt (NMI) input
Supports for both level-sensitive and pulse-sensitive interrupt lines
Wake-up Interrupt Controller (WIC), providing Ultra-low Power Sleep mode
support
Debug support:
Four hardware breakpoints
Two watch points
Program Counter Sampling Register (PCSR) for non-intrusive code profiling
Single step and vector catch capabilities
Bus interfaces:
Single 32-bit AMBA-3 AHB-Lite system interface providing simple integration to
all system peripherals and memory
Single 32-bit slave port that supports the DAP (Debug Access Port)
Mar 31, 2015
Page 54 of 95
Revision V1.00
NUVOTON [ NUVOTON ]
