Nano100(A)
Pin No.
Pin
Type
Pin Name
Description
LQFP LQFP LQFP
QFN
33
100
64
48
PC.7
I/O
I/O
I
Digital GPIO pin
AD5
EBI Address/Data bus bit5
Timer1 capture input
PWM1 Channel1 output
Digital GPIO pin
87
53
41
TC1
PWM0CH1
PC.6
O
I/O
I/O
I
AD4
EBI Address/Data bus bit4
Timer 0 capture input
SmartCard1 card detect pin
PWM0 Channel0 output
Digital GPIO pin
88
54
42
27
TC0
SC1CD
PWM0CH0
O
PC.15
I/O
User program must enable pull-up resistor in LQFP48
package.
89
55
AD3
I/O
I
EBI Address/Data bus bit3
Timer0 capture input
PWM1 Channel1 output
Digital GPIO pin
TC0
PWM1CH2
O
PC.14
I/O
User program must enable pull-up resistor in LQFP48
package.
90
91
56
57
AD2
I/O
I/O
I/O
I
EBI Address/Data bus bit2
PWM1 Channel3 output
Digital GPIO pin
PWM1CH3
PB.15
28
43
nINT1
External interrupt1 input pin
Snooper pin
SNOOPER
XT1_OUT
I
29
30
92
93
58
59
44
45
O
External 4~24 MHz crystal output pin
XT1_IN
I
External 4~24 MHz crystal input pin
External reset input: Low active, set this pin low reset
chip to initial state. With internal pull-up.
94
95
96
60
61
62
46
31
nRESET
VSS
I
P
P
Ground
Power supply for I/O ports and LDO source for
internal PLL and digital circuit
VDD
Digital GPIO pin
PF.4
I/O
I/O
User program must enable pull-up resistor in LQFP64
and LQFP48 package.
97
I2C0SDA
I2C0 data I/O pin
Mar 31, 2015
Page 49 of 95
Revision V1.00
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