M58LT128HST, M58LT128HSB
Program and erase times and endurance cycles
10
Program and erase times and endurance cycles
The program and erase times and the number of program/erase cycles per block are shown
in Table 16. Exact erase times may change depending on the memory array condition. The
best case is when all the bits in the block are at ‘0’ (preprogrammed). The worst case is
when all the bits in the block are at ‘1’ (not preprogrammed). Usually, the system overhead is
negligible with respect to the erase time. In the M58LT128HST/B the maximum number of
program/erase cycles depends on the V voltage supply used.
PP
(1) (2)
Table 16. Program/erase times and endurance cycles
Typicalafter
100kW/E
Cycles
Parameter
Condition
Min
Typ
Max Unit
Parameter block (16 Kword)
0.4
1.2
1.5
12
12
384
768
5
1
3
2.5
4
s
s
Erase
Preprogrammed
Main block (64
Kword)
Not preprogrammed
Word program
4
s
180
180
µs
Single word
Buffer program
µs
Program(3)
Buffer (32 words) (Buffer Program)
Main block (64 Kword)
Program
µs
ms
µs
10
20
Suspend latency
Erase
5
µs
Main blocks
100,000
100,000
cycles
cycles
Program/erase cycles
(per block)
Parameter blocks
51/110