Signal descriptions
M29W400DT, M29W400DB
2.7
2.8
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s command interface.
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a hardware reset to the
memory or to temporarily unprotect all blocks that have been protected.
A hardware reset is achieved by holding Reset/Block Temporary Unprotect Low, V , for at
IL
least t
. After Reset/Block Temporary Unprotect goes High, V , the memory will be
PLPX
IH
ready for Bus Read and Bus Write operations after t
or t
, whichever occurs last.
RHEL
PHEL
See the Ready/Busy output section, Table 15: Reset/Block Temporary Unprotect AC
characteristics and Figure 14: Reset/Block Temporary Unprotect AC waveforms, for more
details.
Holding RP at V will temporarily unprotect the protected blocks in the memory. Program
ID
and Erase operations on all blocks will be possible. The transition from V to V must be
IH
ID
slower than t
.
PHPHH
2.9
Ready/Busy output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode
and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See Table 15: Reset/Block Temporary Unprotect AC
characteristics and Figure 14: Reset/Block Temporary Unprotect AC waveforms.
During Program or Erase operations Ready/Busy is Low, V . Ready/Busy will remain Low
OL
during Read/Reset commands or hardware resets until the memory is ready to enter Read
mode.
2.10
Byte/Word Organization Select (BYTE)
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V , the memory is in 8-
IL
bit mode, when it is High, V , the memory is in 16-bit mode.
IH
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NUMONYX [ NUMONYX B.V ]
