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M25PX64-SOVME6F 参数 Datasheet PDF下载

M25PX64-SOVME6F图片预览
型号: M25PX64-SOVME6F
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 66 页 / 1330 K
品牌: NUMONYX [ NUMONYX B.V ]
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Initial delivery state  
M25PX64  
Figure 28. Power-up timing  
V
CC  
V
(max)  
CC  
Program, erase and write commands are rejected by the device  
Chip selection not allowed  
V
(min)  
CC  
tVSL  
Read access allowed  
Device fully  
accessible  
Reset state  
of the  
device  
V
WI  
tPUW  
time  
AI04009C  
Table 11. Power-up timing and V threshold  
WI  
Symbol  
Parameter  
Min  
Max  
Unit  
(1)  
tVSL  
VCC(min) to S Low  
30  
1
µs  
ms  
V
(1)  
tPUW  
Time delay to write instruction  
Write inhibit voltage  
10  
(1)  
VWI  
1.5  
2.5  
1. These parameters are characterized only.  
8
Initial delivery state  
The device is delivered with the memory array erased: all bits are set to ‘1’ (each byte  
contains FFh). The status register contains 00h (all status register bits are 0).  
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