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M25PX64-SOVME6F 参数 Datasheet PDF下载

M25PX64-SOVME6F图片预览
型号: M25PX64-SOVME6F
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 66 页 / 1330 K
品牌: NUMONYX [ NUMONYX B.V ]
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Instructions  
M25PX64  
6.19  
Release from deep power-down (RDP)  
Once the device has entered the deep power-down mode, all instructions are ignored  
except the release from deep power-down (RDP) instruction. Executing this instruction  
takes the device out of the deep power-down mode.  
The release from deep power-down (RDP) instruction is entered by driving Chip Select (S)  
Low, followed by the instruction code on serial data input (DQ0). Chip Select (S) must be  
driven Low for the entire duration of the sequence.  
The instruction sequence is shown in Figure 27.  
The release from deep power-down (RDP) instruction is terminated by driving Chip Select  
(S) High. Sending additional clock cycles on Serial Clock (C), while Chip Select (S) is driven  
Low, cause the instruction to be rejected, and not executed.  
After Chip Select (S) has been driven High, followed by a delay, t  
, the device is put in the  
RDP  
standby mode. Chip Select (S) must remain High at least until this period is over. The device  
waits to be selected, so that it can receive, decode and execute instructions.  
Any release from deep power-down (RDP) instruction, while an erase, program or write  
cycle is in progress, is rejected without having any effects on the cycle that is in progress.  
Figure 27. Release from deep power-down (RDP) instruction sequence  
S
tRDP  
0
1
2
3
4
5
6
7
C
Instruction  
DQ0  
High Impedance  
DQ1  
Deep power-down mode  
Standby mode  
AI13745  
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