M25PE40
DC and AC parameters
(1) (2)(3)(4)
Table 22. AC characteristics (75 MHz operation, T9HX (0.11µm) process
)
Test conditions specified in Table 14 and Table 15
Symbol
Alt.
Parameter
Min.
Typ.
Max.
Unit
Clock frequency for the following instructions:
FAST_READ, RDLR, PW, PP, WRLR, PE, SE,
SSE, DP, RDP, WREN, WRDI, RDSR, WRSR
fC
fR
fC
D.C.
75
33
MHz
Clock frequency for READ instructions
Clock High time
D.C.
6
MHz
ns
(5)
tCH
tCLH
tCLL
(5)
tCL
Clock Low time
6
ns
Clock Slew Rate (peak to peak)
S Active Setup time (relative to C)
S Not Active Hold time (relative to C)
Data In Setup time
0.1
5
V/ns
ns
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tCSS
5
ns
tDSU
tDH
2
ns
Data In Hold time
5
ns
S Active Hold time (relative to C)
S Not Active Setup time (relative to C)
S Deselect time
5
ns
5
ns
tCSH
tDIS
tV
100
ns
(6)
tSHQZ
Output Disable time
8
ns
tCLQV
Clock Low to Output Valid
Output Hold time
8/6
ns
tCLQX
tHO
0
ns
(7)
tWHSL
Write Protect Setup time
Write Protect Hold time
20
ns
(7)
tSHWL
100
ns
(6)
tDP
S to Deep Power-down
3
µs
(6)
tRDP
S High to Standby mode
Write Status Register cycle time
Page Write cycle time (256 bytes)
Page Program cycle time (256 bytes)
30
15
23
µs
tW
3
ms
ms
(8)
tPW
11
0.8
(8)
tPP
3
ms
int(n/8) ×
0.025(9)
Page Program cycle time (n bytes)
tPE
tSE
tSSE
tBE
Page Erase cycle time
Sector Erase cycle time
Subsector Erase cycle time
Bulk Erase cycle time
10
1.5
80
8
20
5
ms
s
150
10
ms
s
1. See Important note on page 6.
2. Details of how to find the technology process in the marking are given in AN1995, see also Section 13: Ordering
information.
3. Delivery of parts operating with a maximum clock rate of 75 MHz starts from week 8 of 2008.
4. Preliminary data.
5. tCH + tCL must be greater than or equal to 1/ fC.
6. Value guaranteed by characterization, not 100% tested in production.
7. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
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