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M25PE40-VMP6G 参数 Datasheet PDF下载

M25PE40-VMP6G图片预览
型号: M25PE40-VMP6G
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存存储内存集成电路时钟
文件页数/大小: 62 页 / 1298 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25PE40  
DC and AC parameters  
Table 20. AC characteristics (33 MHz operation)  
33 MHz only available for products marked since week 40 of 2005(1)  
Test conditions specified in Table 14 and Table 15  
Symbol  
Alt.  
Parameter  
Min.  
Typ.  
Max.  
Unit  
Clock frequency for the following instructions:  
FAST_READ, PW, PP, PE, SE, DP, RDP, WREN,  
WRDI, RDSR  
fC  
fR  
fC  
D.C.  
33  
20  
MHz  
Clock frequency for READ instructions  
Clock High time  
D.C.  
13  
13  
0.1  
10  
10  
3
MHz  
ns  
(2)  
tCH  
tCLH  
tCLL  
(2)  
tCL  
Clock Low time  
ns  
Clock Slew Rate (peak to peak)  
S Active Setup time (relative to C)  
S Not Active Hold time (relative to C)  
Data In Setup time  
V/ns  
ns  
tSLCH  
tCHSL  
tDVCH  
tCHDX  
tCHSH  
tSHCH  
tSHSL  
tCSS  
ns  
tDSU  
tDH  
ns  
Data In Hold time  
5
ns  
S Active Hold time (relative to C)  
S Not Active Setup time (relative to C)  
S Deselect time  
5
ns  
5
ns  
tCSH  
tDIS  
tV  
100  
ns  
(3)  
tSHQZ  
Output Disable time  
12  
12  
ns  
tCLQV  
tCLQX  
tTHSL  
tSHTL  
Clock Low to Output Valid  
Output Hold time  
ns  
tHO  
0
ns  
Top Sector Lock Setup time  
Top Sector Lock Hold time  
S to Deep Power-down  
50  
ns  
100  
ns  
(3)  
tDP  
3
µs  
µs  
(3)  
tRDP  
S High to Standby Power mode  
Page Write cycle time (256 bytes)  
30  
11  
(4)  
tPW  
25  
5
ms  
ms  
10.2+  
n*0.8/256  
Page Write cycle time (n bytes)  
Page Program cycle time (256 bytes)  
Page Program cycle time (n bytes)  
1.2  
(4)  
tPP  
0.4+  
n*0.8/256  
tPE  
tSE  
Page Erase cycle time  
Sector Erase cycle time  
10  
1
20  
5
ms  
s
1. Details of how to find the date of marking are given in application note, AN1995.  
2. tCH + tCL must be greater than or equal to 1/ fC.  
3. Value guaranteed by characterization, not 100% tested in production.  
4. When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one sequence  
including all the bytes versus several sequences of only a few bytes (1 n 256).  
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