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M25P20-VMP3G/X 参数 Datasheet PDF下载

M25P20-VMP3G/X图片预览
型号: M25P20-VMP3G/X
PDF下载: 下载PDF文件 查看货源
内容描述: 2兆位,低电压,串行闪存与50MHz的SPI总线接口 [2 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 50 页 / 964 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25P20  
Memory organization  
5
Memory organization  
The memory is organized as:  
262,144 bytes (8 bits each)  
4 sectors (512 Kbits, 65536 bytes each)  
1024 pages (256 bytes each).  
Each page can be individually programmed (bits are programmed from 1 to 0). The device is  
Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable.  
Table 3.  
Memory Organization  
Sector  
Address Range  
3
2
1
0
30000h  
20000h  
10000h  
00000h  
3FFFFh  
2FFFFh  
1FFFFh  
0FFFFh  
Figure 6.  
Block Diagram  
HOLD  
W
High Voltage  
Generator  
Control Logic  
S
C
D
Q
I/O Shift Register  
Status  
Register  
Address Register  
and Counter  
256 Byte  
Data Buffer  
3FFFFh  
30000h  
Size of the  
read-only  
memory area  
20000h  
10000h  
00000h  
000FFh  
256 Bytes (Page Size)  
X Decoder  
AI04079  
15/50  
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