M25P10-A
Instructions
Table 4.
Instruction set
Description
One-byte instruction Address Dummy
Data
Instruction
code
bytes
bytes
bytes
WREN
WRDI
Write Enable
0000 0110
0000 0100
1001 1111
0000 0101
0000 0001
0000 0011
06h
04h
9Fh
05h
01h
03h
0
0
0
0
0
3
0
0
0
0
0
0
0
Write Disable
0
RDID(1)
RDSR
WRSR
READ
Read Identification
Read Status Register
Write Status Register
Read Data Bytes
1 to 3
1 to ∞
1
1 to ∞
Read Data Bytes at Higher
Speed
FAST_READ
0000 1011
0Bh
3
1
1 to ∞
PP
SE
BE
DP
Page Program
Sector Erase
Bulk Erase
0000 0010
1101 1000
1100 0111
1011 1001
02h
D8h
C7h
B9h
3
3
0
0
0
0
0
0
1 to 256
0
0
0
Deep Power-down
Release from Deep Power-
down, and Read Electronic
Signature
0
0
3
0
1 to ∞
RES
1010 1011
ABh
Release from Deep Power-
down
0
1. The Read Identification (RDID) instruction is available in products with process technology code X and Y
(see application note AN1995).
6.1
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 7) sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 7.
Write Enable (WREN) instruction sequence
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction
High Impedance
AI02281E
17/51
NUMONYX [ NUMONYX B.V ]
