®
Numonyx™ StrataFlash Embedded Memory (J3-65nm)
1.3
Configuration & Memory Map
The J3-65nm device features a symmetrically-blocked architecture. The flash device
main array is divided as follows:
• 256-Mbit, organized into two-hundred-fifty-six 128-Kbyte blocks.
Figure 1: J3-65nm Memory Map
A<24:1> 256 Mbit
A<24:0> 256 Mbit
1FFFFFF
FFFFFF
128-Kbyte Block
64-Kword Block
255
255
1FE0000
FF0000
0FFFFFF
7FFFFF
7F0000
127
63
127
63
128-Kbyte Block
64-Kword Block
64-Kword Block
0FE0000
07FFFFF
3FFFFF
3F0000
128-Kbyte Block
07E0000
003 FFFF
01FFFF
128-Kbyte Block
1
0
64-Kword Block
64-Kword Block
1
0
0020000
010000
001 FFFF
00FFFF
128-Kbyte Block
0000000
000000
Byte-Wide (x8) Mode
Word Wide (x16) Mode
December 2008
319942-02
Datasheet
7
NUMONYX [ NUMONYX B.V ]
