28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
9.2
Reset Specifications
Table 26.
Reset Specifications
VCC 2.7 V – 3.6 V
Symbol
Parameter
Unit
Notes
Min
Max
RP# Low to Reset during Read
(If RP# is tied to VCC, this specification is not
applicable)
tPLPH
100
ns
1, 2
tPLRH1
tPLRH2
RP# Low to Reset during Block Erase
RP# Low to Reset during Program
22
12
µs
µs
3
3
Notes:
1.
2.
If tPLPH is < 100 ns, the device can still reset, but reset is not guaranteed.
If RP# is asserted while a Block Erase or Word Program operation is not executing, the
reset completes within 100 ns.
3.
Sampled, but not 100% tested.
Figure 14.
Deep Power-Down/Reset Operations Waveforms
V
IH
RP# (P)
tPHQV
tPHWL
tPHEL
VIL
t PLPH
(A) Reset during Read Mode
Abort
Complete
t PLRH
tPHQV
tPHWL
tPHEL
VIH
VIL
RP# (P)
t PLPH
tPLPH
t PLRH
<
(B) Reset during Program or Block Erase,
Abort Deep
Complete Power-
tPHQV
tPHWL
tPHEL
Down
tPLRH
VIH
VIL
RP# (P)
t PLPH
(C) Reset Program or Block Erase, t PLPH > tPLRH
18 Aug 2005
48
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet