28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
• The Command User Interface (CUI) is the interface between the microprocessor or
microcontroller and the internal operation of the flash memory.
• The internal Write State Machine (WSM) automatically executes the algorithms and timings
necessary for Program and Erase operations (including verification), which unburdens the
microprocessor or microcontroller.
• To indicate the status of the WSM, the Status Register signifies block erase or word program
completion and status.
The B3 flash memory device also provides Automatic Power Savings (APS), which minimizes
system current drain and allows for very low power designs. This mode is entered following the
completion of a read cycle (approximately 300 ns later).
The RP# pin provides additional protection against unwanted command writes that might occur
during system reset and power-up/down sequences due to invalid system bus conditions (see
“Power and Reset Specifications” on page 47).
• Section 10.0, “Operations Overview” on page 50 explains the different modes of operation.
• Section 7.0, “Electrical Specifications” on page 34 and Section 8.0, “AC Characteristics” on
page 37 provide complete current and voltage specifications.
• Section 8.1, “AC Read Characteristics” on page 37 provides read, program, and erase
performance specifications.
3.1
Architecture Diagram
Figure 1.
B3 Architecture Block Diagram
DQ0-DQ15
VCCQ
Output Buffer
Input Buffer
Identifier
Register
Status
Register
I/O Logic
CE#
WE#
OE#
RP#
Command
User
Interface
Power
Reduction
Control
Data
Comparator
WP#
A0-A19
Y-Decoder
Y-Gating/Sensing
Write State
Machine
Program/Erase
Voltage Switch
Input Buffer
VPP
Address
Latch
X-Decoder
VCC
GND
Address
Counter
18 Aug 2005
10
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet