LP2995
Typical Application Circuits
The typical application circuit used for SSTL-2 termination
schemes with DDR-SDRAM can be seen in
20039306
SSTL-2 Implementation
FIGURE 5.
For SSTL-3 and other applications it may be desirable to
change internal reference voltage scaling from VDDQ
*
0.5.
An external resistor in series with the VDDQ pin can be used
to lower the reference voltage. Internally two 50 kΩ resistors
set the output V
TT
to be equal to VDDQ
*
0.5. The addition
of a 11.1 kΩ external resistor will change the internal refer-
ence voltage causing the two outputs to track VDDQ
*
0.45.
An implementation of this circuit can be seen in
20039307
SSTL-3 Implementation
FIGURE 6.
Another application that is sometimes required is to increase
the V
TT
output voltage from the scaling factor of VDDQ
*
0.5.
This can be accomplished independently of V
REF
by using a
resistor divider network between V
TT
, V
SENSE
and Ground.
An example of this circuit can be seen in
20039303
FIGURE 7.
9
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