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LP2995M 参数 Datasheet PDF下载

LP2995M图片预览
型号: LP2995M
PDF下载: 下载PDF文件 查看货源
内容描述: DDR终端稳压器 [DDR Termination Regulator]
分类和应用: 稳压器接口集成电路光电二极管双倍数据速率
文件页数/大小: 13 页 / 290 K
品牌: NSC [ NATIONAL SEMICONDUCTOR ]
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LP2995
Absolute Maximum Ratings
Lead Temperature (Soldering, 10 sec)
ESD Rating (Note 7)
260˚C
1kV
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
PVIN, AVIN, VDDQ to GND
Storage Temp. Range
Junction Temperature
SO-8 Thermal Resistance (θ
JA
)
LLP-16 Thermal Resistance (θ
JA
)
−0.3V to +6V
−65˚C to +150˚C
150˚C
151˚C/W
51˚C/W
Operating Range
Junction Temp. Range (Note 5)
AVIN to GND
PVIN to GND
0˚C to +125˚C
2.2V to 5.5V
2.2V to AVIN
Specifications with standard typeface are for T
J
= 25˚C and limits in
boldface
type
apply over the full
Operating Temperature Range
(T
J
= 0˚C to +125˚C). Unless otherwise specified,
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 6).
Symbol
V
REF
VOS
VTT
∆V
TT
/V
TT
Z
VREF
Z
VDDQ
I
q
Parameter
V
REF
Voltage
V
TT
Output Voltage Offset
Load Regulation
V
REF
Output Impedance
VDDQ Input Impedance
Quiescent Current
I
OUT
= 0A
Conditions
I
REF_OUT
= 0mA
I
OUT
= 0A
I
OUT
= 0 to 1.5A
I
OUT
= 0 to −1.5A
I
REF
= −5µA to +5µA
Min
1.21
−15
−20
Typ
1.235
0
0.5
−0.5
5
100
250
400
kΩ
kΩ
µA
Max
1.26
15
20
Units
V
mV
%
Electrical Characteristics
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2:
V
TT
offset is the voltage measurement defined as V
TT
subtracted from V
REF
.
Note 3:
Load regulation is tested by using a 10ms current pulse and measuring V
TT
.
Note 4:
Quiescent current defined as the current flow into AVIN.
Note 5:
At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at
θ
JA
= 151˚ C/W
junction to ambient with no heat sink. The device in the LLP-16 must be derated at
θ
JA
= 51˚ C/W junction to ambient.
Note 6:
Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 7:
The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
3
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