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LP2995M 参数 Datasheet PDF下载

LP2995M图片预览
型号: LP2995M
PDF下载: 下载PDF文件 查看货源
内容描述: DDR终端稳压器 [DDR Termination Regulator]
分类和应用: 稳压器接口集成电路光电二极管双倍数据速率
文件页数/大小: 13 页 / 290 K
品牌: NSC [ National Semiconductor ]
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Absolute Maximum Ratings (Note 1)  
Lead Temperature (Soldering, 10 sec)  
ESD Rating (Note 7)  
260˚C  
1kV  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Operating Range  
Junction Temp. Range (Note 5)  
PVIN, AVIN, VDDQ to GND  
Storage Temp. Range  
−0.3V to +6V  
−65˚C to +150˚C  
150˚C  
0˚C to +125˚C  
2.2V to 5.5V  
2.2V to AVIN  
AVIN to GND  
Junction Temperature  
PVIN to GND  
SO-8 Thermal Resistance (θJA  
)
151˚C/W  
LLP-16 Thermal Resistance (θJA  
)
51˚C/W  
Electrical Characteristics Specifications with standard typeface are for TJ = 25˚C and limits in boldface  
type apply over the full Operating Temperature Range (TJ = 0˚C to +125˚C). Unless otherwise specified,  
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 6).  
Symbol  
VREF  
Parameter  
VREF Voltage  
Conditions  
Min  
1.21  
−15  
−20  
Typ  
1.235  
0
Max  
1.26  
15  
Units  
V
IREF_OUT = 0mA  
VOSVTT  
VTT Output Voltage Offset IOUT = 0A  
(Note 2)  
mV  
20  
VTT/VTT  
Load Regulation  
(Note 3)  
IOUT = 0 to 1.5A  
0.5  
−0.5  
5
%
IOUT = 0 to −1.5A  
ZVREF  
ZVDDQ  
Iq  
VREF Output Impedance  
VDDQ Input Impedance  
Quiescent Current  
IREF = −5µA to +5µA  
kΩ  
kΩ  
µA  
100  
250  
IOUT = 0A  
(Note 4)  
400  
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is  
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The  
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed  
test conditions.  
Note 2: V offset is the voltage measurement defined as V subtracted from V .  
REF  
TT  
TT  
Note 3: Load regulation is tested by using a 10ms current pulse and measuring V  
Note 4: Quiescent current defined as the current flow into AVIN.  
.
TT  
Note 5: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at θ = 151˚ C/W  
JA  
junction to ambient with no heat sink. The device in the LLP-16 must be derated at θ = 51˚ C/W junction to ambient.  
JA  
Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control  
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).  
Note 7: The human body model is a 100pF capacitor discharged through a 1.5kresistor into each pin.  
3
www.national.com  
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