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LM80CIMT-3 参数 Datasheet PDF下载

LM80CIMT-3图片预览
型号: LM80CIMT-3
PDF下载: 下载PDF文件 查看货源
内容描述: 串行接口ACPI兼容微处理器系统硬件监控 [Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor]
分类和应用: 微处理器光电二极管监控
文件页数/大小: 29 页 / 438 K
品牌: NSC [ National Semiconductor ]
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Functional Description (Continued)  
12.7 Interrupt Mask Register 2 — Address 44h  
=
>
<
Power on default 7:0  
0000 0000 binary  
Bit  
Name  
Read/  
Write  
Description  
0
1
2
3
4
Hot Temperature  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
A one disables the corresponding interrupt status bit for INT interrupt.  
A one disables the corresponding interrupt status bit for INT interrupt.  
A one disables the corresponding interrupt status bit for INT interrupt.  
A one disables the corresponding interrupt status bit for INT interrupt.  
A one disables the corresponding interrupt status bit for INT interrupt.  
BTI  
FAN1  
FAN2  
CI (Chassis  
Intrusion)  
5
6
OS bit  
Read/Write  
Read/Write  
A one disables the corresponding interrupt status bit for INT interrupt.  
Hot Temperature  
Interrupt mode  
select  
A zero selects the default interrupt mode which gives the user an interrupt if the tem-  
perature goes above the hot limit. The interrupt will be cleared once the status register  
is read, but it will again be generated when the next conversion has completed. It will  
continue to do so until the temperature goes below the hysteresis limit.  
A one selects the one time interrupt mode which only gives the user one interrupt when  
it goes above the hot limit. The interrupt will be cleared once the status register is read.  
Another interrupt will not be generated until the temperature goes below the hysteresis  
limit. It will also be cleared if the status register is read. No more interrupts will be gen-  
erated until the temperature goes above the hot limit again. The corresponding bit will  
be cleared in the status register every time it is read but may not set again when the  
next conversion is done. (See in Section 7.0)  
7
OS bit Interrupt  
mode select  
Read/Write  
A zero selects the default interrupt mode which gives the user an interrupt if the tem-  
perature goes above the hot limit. The interrupt will be cleared once the status register  
is read, but it will again be generated when the next conversion has completed. It will  
continue to do so until the temperature goes below the hysteresis limit.  
A one selects the one time interrupt mode which only gives the user one interrupt when  
it goes above the hot limit. The interrupt will be cleared once the status register is read.  
Another interrupt will not be generated until the temperature goes below the hysteresis  
limit. It will also be cleared if the status register is read. No more interrupts will be gen-  
erated until the temperature goes above the hot limit again. The corresponding bit will  
be cleared in the status register every time it is read but may not set again when the  
next conversion is done. (See Section in Section 7.0)  
25  
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