External Sense Resistor
Functional Description (Continued)
The VDS of a PFET will tend to vary significantly over tem-
perature. This will result an equivalent variation in current
limit. To improve current limit accuracy an external sense
resistor can be connected from VIN to the source of the
PFET, as shown in Figure 5.
Start Up
The current limit circuit is active during start-up. During
start-up the PFET will stay on until either the current limit or
the feedback comparator is tripped
If the current limit comparator is tripped first then the fold
back characteristic should be taken into account. Start-up
into full load may require a higher current limit set point or the
load must be applied after start-up.
One problem with selecting a higher current limit is inrush
current during start-up. Adding a capacitance (CADJ) in par-
allel with RADJ results in soft-start. CADJ and RADJ create an
RC time constant forcing current limit to activate at a lower
current. The output voltage will ramp more slowly when
using the soft-start functionality.
The CADJ also filters unwanted noise so that the ISENSE
comparator will not be accidentally triggered. A value of
100pF to 1nF is recommended in most applications. These
low values for CADJ will have little to no effect on soft-start.
There are example start-up plots for CADJ equal to 1nF and
10nF in the Typical Performance Characteristics.
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FIGURE 5. Current Sensing by External Resistor
11
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