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COP8FG 参数 Datasheet PDF下载

COP8FG图片预览
型号: COP8FG
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS基于ROM和OTP微控制器具有8K到32K的内存,两个比较器和USART [8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART]
分类和应用: 比较器微控制器
文件页数/大小: 59 页 / 803 K
品牌: NSC [ National Semiconductor ]
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Jump to Subroutine Long (JSRL)  
Return from Subroutine (RET)  
Return from Subroutine and Skip (RETSK)  
Return from Interrupt (RETI)  
14.0 Instruction Set (Continued)  
Jump Indirect. In this 1-byte instruction, the lower byte of  
the jump address is obtained from a table stored in program  
memory, with the Accumulator serving as the low order byte  
of a pointer into program memory. For purposes of access-  
ing program memory, the contents of the Accumulator are  
written to PCL (temporarily). The data pointed to by the Pro-  
gram Counter (PCH/PCL) is loaded into PCL, while PCH re-  
mains unchanged.  
Software Trap Interrupt (INTR)  
Vector Interrupt Select (VIS)  
14.4.3 Load and Exchange Instructions  
The load and exchange instructions write byte values in reg-  
isters or memory. The addressing mode determines the  
source of the data.  
Example: Jump Indirect  
JID  
Load (LD)  
Reg/  
Memory  
PCU  
Contents  
Before  
01 Hex  
C4 Hex  
26 Hex  
Contents  
After  
Load Accumulator Indirect (LAID)  
Exchange (X)  
01 Hex  
32 Hex  
26 Hex  
PCL  
14.4.4 Logical Instructions  
The logical instructions perform the operations AND, OR,  
and XOR (Exclusive OR). Other logical operations can be  
performed by combining these basic operations. For ex-  
ample, complementing is accomplished by exclusiveORing  
the Accumulator with FF Hex.  
Accumulator  
Memory  
Location  
0126 Hex  
32 Hex  
32 Hex  
The VIS instruction is a special case of the Indirect Transfer  
of Control addressing mode, where the double-byte vector  
associated with the interrupt is transferred from adjacent ad-  
dresses in program memory into the Program Counter in or-  
der to jump to the associated interrupt service routine.  
Logical AND (AND)  
Logical OR (OR)  
Exclusive OR (XOR)  
14.4.5 Accumulator Bit Manipulation Instructions  
The Accumulator bit manipulation instructions allow the user  
to shift the Accumulator bits and to swap its two nibbles.  
14.4 INSTRUCTION TYPES  
The instruction set contains a wide variety of instructions.  
The available instructions are listed below, organized into re-  
lated groups.  
Rotate Right Through Carry (RRC)  
Rotate Left Through Carry (RLC)  
Swap Nibbles of Accumulator (SWAP)  
Some instructions test a condition and skip the next instruc-  
tion if the condition is not true. Skipped instructions are ex-  
ecuted as no-operation (NOP) instructions.  
14.4.6 Stack Control Instructions  
Push Data onto Stack (PUSH)  
Pop Data off of Stack (POP)  
14.4.1 Arithmetic Instructions  
The arithmetic instructions perform binary arithmetic such as  
addition and subtraction, with or without the Carry bit.  
14.4.7 Memory Bit Manipulation Instructions  
Add (ADD)  
The memory bit manipulation instructions allow the user to  
set and reset individual bits in memory.  
Add with Carry (ADC)  
Subtract (SUB)  
Set Bit (SBIT)  
Subtract with Carry (SUBC)  
Increment (INC)  
Reset Bit (RBIT)  
Reset Pending Bit (RPND)  
Decrement (DEC)  
Decimal Correct (DCOR)  
Clear Accumulator (CLR)  
Set Carry (SC)  
14.4.8 Conditional Instructions  
The conditional instruction test a condition. If the condition is  
true, the next instruction is executed in the normal manner; if  
the condition is false, the next instruction is skipped.  
Reset Carry (RC)  
If Equal (IFEQ)  
If Not Equal (IFNE)  
14.4.2 Transfer-of-Control Instructions  
If Greater Than (IFGT)  
If Carry (IFC)  
The transfer-of-control instructions change the usual se-  
quential program flow by altering the contents of the Pro-  
gram Counter. The Jump to Subroutine instructions save the  
Program Counter contents on the stack before jumping; the  
Return instructions pop the top of the stack back into the  
Program Counter.  
If Not Carry (IFNC)  
If Bit (IFBIT)  
If B Pointer Not Equal (IFBNE)  
And Skip if Zero (ANDSZ)  
Decrement Register and Skip if Zero (DRSZ)  
Jump Relative (JP)  
Jump Absolute (JMP)  
Jump Absolute Long (JMPL)  
Jump Indirect (JID)  
Jump to Subroutine (JSR)  
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