TABLE 28. ADGAIN
15.0 A/D Converter (Continued)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TABLE 26. ADRSTH
EN-
AMP1
ENTS TRIM
Reserved
GAIN2 GAIN1 GAIN0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
ENAMP1 Enables stand-alone amplifier (AMP1) to port B.
Enabled = 1. Disabled =0.
TABLE 27. ADRSTL
ENTS
TRIM
Enable internal temperature sensor. Enabled =
1. Disabled = 0.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Configures the programmable gain amplifier into
the trimming configuration by shorting its + and −
inputs together. Enabled = 1. Disabled = 0. This
bit should be set to 0 for normal use of the
programmable gain amplifier.
Bit 1
Bit 0
0
0
0
0
0
0
15.2 PROGRAMMABLE GAIN AMPLIFIER
A programmable gain amplifier is located between the ana-
log multiplexor and the input to the A/D. It supports single
ended mode only. The gain of this amplifier is selected by the
ADGAIN register shown in Table 28. This register is also
used to enable the stand-alone amplifier (AMP1) on port pins
B3, B4 and B5, the internal temperature sensor, and the
offset trimming configuration. Both the stand-alone amplifier
and the programmable gain amplifier will draw DC current
when enabled. To minimize the amount of current drawn in
the HALT mode, the user should disable both amplifiers
before entering HALT. This register is initialized to 00h on
Reset.
GAIN2:0 Controls the gain of the programmable gain am-
plifier. See Table 29. When performing a conver-
sion on the temperature sensor, a gain of 1 or 2
must be selected, depending on the operating
voltage of the device. A gain of 2 can only be
used for the temperature sensor if VCC ≥ 4.5V.
Reserved These bits are reserved and must be 0.
TABLE 29. Gain Bit Assignments
TRIM
GAIN2
GAIN1
GAIN0
Gain Tolerance
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
Not Applicable
Amplifier disabled and bypassed.
1
1
Gain = 1
Gain = 2
1
Gain = 5
2
Gain = 10
2
Gain = 20
2
Gain = 49
2
Gain = 98
N/A
Gain = open loop for trimming. Amplifier is
enabled.
15.2.1 Programmable Gain Amplifier Settling Time
This should give the amplifier time to settle within 0.5 LSB of
the A/D converter. This settling time needs to be taken into
effect if either the gain is changed or if the channel is
changed. Since these values are in different registers, they
can’t be changed simultaneously and must be changed in-
dividually. The settling time starts whenever either one is
changed, but it’s not cumulative. The user should wait the
amount of settling time specified after the latter of the chan-
nel or gain change.
When changing channels or the gain, it’s necessary to give
the programmable gain amplifier time to settle before per-
forming an A/D conversion. This is because the input from
the previous channel could have the amplifier output near
one power supply rail and the newly selected channel or gain
may need to drive the output to the other power supply rail.
The amount of settling time is based on the gain of the
amplifier. See Table 30. It is recommended that the user wait
7.6 time constants (τ) before performing an A/D conversion.
TABLE 30. Programmable Gain Amplifier Settling Times
GAIN
Time Constant (τ)
Settling Time (7.6 * τ)
1
Slew Rate Limited
Slew Rate Limited
2
Under-Damp Response
9µs
6µs
5
Under-Damp Response
10
0.7µs
2 µs
5 µs
20
49
16 µs
25 µs
45 µs
1050 µs
3.2 µs
5.8 µs
N/A
98
Open Loop
www.national.com
52
NSC [ National Semiconductor ]
