I
BN
+
+
R
eq1
V
os
CLC449
-
-
I
BI
R
f
R
eq2
V
o
R
L
Matching the output transmission line over greater
frequency ranges is accomplished by placing C
6
in
parallel with R
6
, reducing the output impedance to
compensate for the internal increase of the op-amp’s out-
put impedance with frequency.
Thermal Design
To calculate the power dissipation for the CLC449,
follow these steps:
Figure 5: DC Offset Model
DC Design (Output Loading)
R
L
, R
f
, and R
g
load the op amp output. The equivalent
closed-loop load impedance seen by the output in Figure
5 is:
•
Calculate the no-load op amp power:
P
amp
= I
cc
•
(V
cc
– V
ee
)
•
Calculate the output stage’s RMS power:
P
o
= (V
cc
– V
load
)
•
I
load
where V
load
and I
load
are the RMS voltage and
current across the external load.
•
R
L_eq
= R
L
|| (R
f
+ R
eq2
), non-inverting gain
•
R
L_eq
= R
L
|| R
f
, inverting gain
R
L_eq
needs to be kept large enough so that the
minimum available output current can produce the
required output voltage swing.
Capacitive Loads
Capacitive loads, such as found in A/D converters,
require a series resistor (R
s
) in the output to improve set-
tling performance. The
R
s
and Settling Time vs. C
L
plot
in the
Typical Performance Characteristics
section
provides the information for selecting this resistor.
Also, use a series resistor to reduce the effects of
reactive loads on amplifier loop dynamics. For instance,
driving coaxial cables without an output series resistor
may cause peaking or oscillation.
Transmission Line Matching
One method for matching the characteristic impedance of
a transmission line is to place the appropriate resistor at
the input or output of the amplifier. Figure 6 shows the
typical circuit configurations for matching transmission
lines.
R
1
V
1
+
-
R
4
V
2
+
-
Z
0
Z
0
R
3
R
2
R
g
R
5
C
6
+
•
Calculate the total op amp RMS power:
P
t
= P
amp
+ P
o
To calculate the maximum allowable ambient tempera-
ture, solve the following equation: T
amb
= 175 – P
t
•
θ
JA
,
where
θ
JA
is the thermal resistance from junction to
ambient in °C/W and T
amb
is in °C. Thermal resistance
for the various packages are found in the
Package
Thermal Resistance
section.
Dynamic Range (Input /Output Protection)
Input ESD diodes are present on all connected pins for
protection from static voltage damage. For a signal that
may exceed the supply voltages, we recommend using
diode clamps at the amplifier’s input to limit the signals to
less than the supply voltages.
Dynamic Range (Input /Output Levels)
The
Electrical Characteristics
section contains the
Common-Mode Input Range and Output Voltage
Range; these voltage ranges scale with the supplies.
Output Current is also specified in the
Electrical
Characteristics
section.
Unity gain applications are limited by the Common-Mode
Input Range. At greater non-inverting gains, the Output
Voltage Range becomes the limiting factor. Inverting gain
applications are limited by the Output Voltage Range.
For transimpedance or inverting gain applications, the
current (I
inv
) injected at the inverting input pin of the op
amp needs to be:
V
|I
inv
|
≤
max
R
f
where V
max
is the Output Voltage Range.
The voltage ranges discussed above are achieved as
long as the equivalent output load is large enough so that
the output current can produce the required output
voltage swing. See the
DC Design (Output Loading)
sub-section for details.
Dynamic Range (Intermods)
For RF applications, the CLC449 specifies a third
order intercept of 30dBm at 70MHz and P
o
= 10dBm.
6
Z
0
R
6
CLC449
-
V
o
R
7
R
f
Figure 6: Transmission Line Matching
In non-inverting gain applications, R
g
is connected directly
to ground.
The resistors R
1
, R
2
, R
6
, and R
7
are equal to the characteristic impedance, Z
o
, of the
transmission line or cable.
In inverting gain applications, R
3
is connected directly to
ground. The resistors R
4
, R
6
, and R
7
are equal
to Z
o
. The parallel combination of R
5
and R
g
is also equal
to Z
o
.
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
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