CLC449 Typical Performance Characteristics
(T
A
= 25°C, V
cc
= + 5V, R
f
= 250Ω, A
v
= +2, R
L
= 100Ω)
Gain Compression
Input Bias Current, I
BI
, I
BN
(µA)
Input Offset Voltage, V
IO
(mV)
Magnitude (1dB/div)
Settling Time (ns)
R
s
(ohms)
Input VSWR
1.9
1.8
1.7
1.6
VSWR
VSWR
Output VSWR
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
Uncompensated
Reverse Isolation (S
12
)
-10
-20
-30
-40
|S
12
| (dB)
Compensated
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0
100M
200M
300M
Frequency (Hz)
400M
500M
Non-Inverting
Inverting
-50
-60
-70
-80
-90
-100
0
100M
200M
300M
Frequency (Hz)
400M
500M
0
100M
200M
300M
Frequency (Hz)
400M
500M
CLC449 OPERATION
CLC449 Extended Application Information
The following design and application topics will supply
you with:
The normalized gain plots in the
Typical Performance
Characteristics
section show different feedback resistors,
R
f
, for different gains. These values of R
f
are recom-
mended for obtaining the highest bandwidth with minimal
peaking. The resistor R
t
in Figure 1 provides DC bias for
the non-inverting input.
For A
v
≤
5, calculate the recommended R
f
as follows:
R
f
≅
340 - A
v
•
R
i
, where R
i
= 45Ω. For A
v
> 5, the
minimum recommended feedback resistor is R
f
= 100Ω.
Select R
g
to set the DC gain: R
g
=
R
f
A
v
−
1
•
A comprehensive set of design parameters and
design parameter adjustment techniques.
•
A set of formulas that support design parameter
change prediction.
•
A series of common applications that the CLC449
supports.
•
A set of easy to use design guidelines for the
CLC449.
Additional design applications are possible with the
CLC449. If you have application questions, call 1-800-272-
9959 in the U.S. to contact a technical staff member.
DC Gain (Non-Inverting)
The non-inverting DC voltage gain for the configuration
shown in Figure 1 is:
R
A
V
=
1
+
f
R
g
V
cc
+
Accuracy of DC gain is usually limited by the tolerance of
the external resistors R
f
and R
g
.
DC Gain (Unity Gain Buffer)
Unity gain buffers are easily designed with a current-
feedback amplifier as long as the recommended feed-
back resistor R
f
= 402Ω is used and R
g
=
∞,
i.e. open.
Parasitic capacitance at the inverting node may require a
slight increase of the feedback resistor R
f
to maintain a
flat frequency response.
DC Gain (Inverting)
The inverting DC voltage gain for the configuration shown
in Figure 2 is:
A
v
= −
R
f
R
g
V
in
R
t
3
+
-
7
6
CLC449
2
4
0.1µF
V
o
6.8µF
R
f
V
ee
0.1µF
6.8µF
R
g
Figure 1: Non-Inverting Gain
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