Functional Description
The ’ABT373 contains eight D-type latches with
Truth Table
Inputs
Output
TRI-STATE output buffers. When the Latch Enable (LE) in-
put is HIGH, data on the D inputs enters the latches. In this
n
LE
OE
D
n
O
n
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The TRI-STATE buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers are
in the bi-state mode. When OE is HIGH the buffers are in
the high impedance mode but this does not interfere with
entering new data into the latches.
H
H
L
L
L
H
H
L
X
X
L
L
O
(no change)
Z
n
X
H
e
e
e
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
X
Z
High Impedance State
Logic Diagram
TL/F/11547–3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
NSC [ National Semiconductor ]
