Index (Continued)
VSA
25
86
Debug Registers
Gate Descriptors
Task Register
47
69
69, 70
44–59
47
Shutdown and Halt
Signal Definitions
13–23
Signal Descriptions
Cyrix Internal Test and Measurement Signals
Memory Controller Interface Signals
PCI Interface Signals
Power, Ground and No Connect Signals
System Interface Signals
Video Interface Signals
Signals - INTR
24
System Registers
Configuration Registers
Control Registers
Debug Registers
Model Specific Register (MSR)
Segment Descriptor Table Registers
Test Registers
29–3320
26–29
45
52
59
66
24–2352
30–31
74
54
T
Signals - NMI
74
Task Gate Descriptors
Task Register (TR)
Task State Segments
Thermal Characteristics
TR3 Register
Cache Data
70
70
70
195
57
57
57
57
57
57
57
57
57
57
55
55
55
55
55
55
55
55
55
55
95
Signals - SMM
SIZE
SMM Region Size Bits
Skip Counts
SMAR
SMM Address Region Bits
SMAR SMM Address Region Register Indices CDh, CEH, CFh
51
SMHR
SMM Header Address
SMHR SMI Header Address Indices B0h, B1h, B2h, B3h 50
SMI
Configuration Registers
Generation
SMI#
pin
SMI# pin
SMM
74
51
94
51
TR4 Register
Dirty Bits
LRU Bits
Upper Tag Address
Valid Bit
51
TR5 Register
Control Bits
80
83
Line Selection
TR6 Register
Command Bit
Dirty Attribute Bit
Linear Address
Valid Bit
TR7 Register
LRU Bits
Physical Address
PL Bit
Set Selection
Translation Lookaside Buffer
74, 75, 78
80
174
78
85
82
83
80
79
79
80
CPU States
Instructions
Memory Space
Memory Space Header
Operation
SMI Enhancements
SMI Events
SMI Nested States
SMI Nesting
SMI Service Routine Execution
SMI# Pin
84
83
83
80
85
85
81
20
V
V86 Mode
Entering and Leaving
Interrupt Handling
Memory Addressing
VESA
VGA Address Mapping
MapMask register
Miscellaneous Output register
VGA Configuration Registers
VGA Control Register (B9h)
VGA Mask Register (BAh-BDh)
VGA Front End
88
88
88
Suspend Mode
Suspend Mode CPU States
SMM Memory Space Header Description
SPGA Pin Assignments by Pin Number
SPGA Pin Assignments by Signal Name
SPGA Pin Assignments Diagram
STOP
Subsystem Signal Connections
Suspend
Suspend Mode
165
167
167
167
169
169
169
166
22
19
27
59, 3845–, 8365
25
28
28
VGA function
System Error
attribute controller
CRT controller
frame buffer
general registers
graphics controller
sequencer
166
166
166
166
166
NMI
System Interface Signals
Interrupt Request
25
24
25
25
25
24
25
165
44
Reset
Serial Packet
Suspend Acknowledge
Suspend Request
System Clock
166
VGA Hardware
165, 168
SMI Generation
VGA Address Generator
VGA Memory
VGA Range Detection
VGA Sequencer
168
168
168
168
168
168
171
System Management Interrupt
System Management Interrupt (SMI#)
System Register Set
System Register Sets
Cache Test Registers
Configuration Registers
VGA Write/Read Path
VGA Memory
56
47
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