Electrical Specifications (Continued)
Table 7-9. PCI Interface Signals
Symbol
Parameter
Min
Max
Unit
Notes
tVAL1
Delay Time, SYSCLK to Signal Valid for Bused
Signals
2
11
ns
tVAL2
tON
Delay Time, SYSCLK to Signal Valid for GNT#
Delay Time, Float to Active
2
2
12
28
ns
ns
ns
ns
ns
ns
Note
tOFF
tSU1
tSU2
tH
Delay Time, Active to Float
Input Setup Time for Bused Signals
Input Setup Time for REQ#
7
12
0
Note
Input Hold Time to SYSCLK
Note: GNT# and REQ# are point-to-point signals. All other PCI interface signals are bused.
Refer to Chapter 4 of PCI Local Bus Specification, Revision 2.1, for more detailed information.
SYSCLK
t
VAL1,2
OUTPUT
TRISTATE
OUTPUT
t
ON
t
OFF
Figure 7-4. Output Timing
SYSCLK
INPUT
t
t
SU1,2
H
Figure 7-5. Input Timing
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