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SM9501A 参数 Datasheet PDF下载

SM9501A图片预览
型号: SM9501A
PDF下载: 下载PDF文件 查看货源
内容描述: 电波钟接收器IC [Radio Controlled Clock Receiver IC]
分类和应用:
文件页数/大小: 10 页 / 138 K
品牌: NPC [ NIPPON PRECISION CIRCUITS INC ]
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SM9501A/B  
Crystal Filter Circuit  
XO  
XI  
Rx40  
Rx60  
Cx40  
Cx60  
40kHz  
60kHz  
External crystals are used as lters. Multiple frequencies (40kHz and 60kHz) are supported by connecting  
crystals in parallel. The center frequency and bandwidth of the lters is determined by the crystal characteris-  
tics. If the center frequency is lower than the target frequency, C×40 and C×60 can be added to change the res-  
onant frequency. And R×40 and R×60 can be added to adjust the lter Q factor. Internally, pin XO is linked to  
pin XI by a phase-inverted signal passed through a capacitor, which cancels the high-frequency components  
that pass through the crystal parallel capacitances.  
Detector Circuit  
The amplied signal is full-wave rectied and passed through a lowpass lter detector. The detector output is  
input to peak hold (pin CP) and bottom hold (pin CB) circuits to form the decoder reference potentials and  
peak hold potential for AGC control.  
Peak hold  
Peak/  
Bottom  
Hold  
Rectifier  
LPF  
Amplifier  
Bottom hold  
VSS potential  
VSS potential  
VSS potential  
Decoder Circuit  
The detector output and peak/bottom hold mid-level potential reference are used to decode the time code sig-  
nal, which is output on pin OUT. The output is active-LOW, so that the output is LOW when the input ampli-  
tude is HIGH.  
Rectifier  
LPF  
LPF waveform  
VDD potential  
Decoder  
VSS potential  
OUT output  
Peak hold  
VSS potential  
Peak/  
Bottom  
Hold  
Mid-level potential  
Bottom hold  
VSS potential  
Standby Function  
When PON is open (or HIGH), the device is in standby mode and the current consumption is reduced. Receiver  
operation starts when PON goes LOW.  
PON  
Open (or HIGH)  
LOW  
Mode  
Standby  
Operating  
OUT  
HIGH  
Time code  
NIPPON PRECISION CIRCUITS INC.—9