SM5843A×1
TIMING DIAGRAMS
Input Timing Examples (DIN, BCKI, LRCI)
1 / fs
Lch DATA
(MSB)
Rch DATA
(LSB)
(MSB)
(LSB)
DI
1
2
14 15 16
1
2
14 15 16
BCKI
LRCI
Figure 7. LR alternating, trailing data, 16-bit input
1 / fs
Lch DATA
(MSB)
(LSB)
19 20
1
2
3
1
DIL
Rch DATA
2 3
(MSB)
(LSB)
19 20
1
DIR
BCKI
LRCI
Data after lsb (bit 20) is ignored. After bit 20, BCKI clock input is not needed.
Figure 8. LR alternating, leading data, 20-bit input
1 / fs
(MSB)
Lch DATA
(LSB)
1
2
3
3
4
5
6
1
18 19 20
DIL
DIR
(MSB)
Rch DATA
(LSB)
5
1
2
4
6
18 19 20
1
BCKI
LRCI
Data after lsb (bit20) is ignored. After bit 20, BCKI clock input is not needed.
Figure 9. LR simultaneous, leading data, 20-bit input
NIPPON PRECISION CIRCUITS—19
NPC [ NIPPON PRECISION CIRCUITS INC ]
