CF5015 series
PAD LAYOUT
(Unit: µm)
(720,680)
Q
VDD
HA
5015
VSS
Y
INHN
(0,0)
XT XTN
X
Chip size: 0.72 × 0.68mm
Chip thickness: 220 ꢀ0ꢁm
PAD size: 90ꢁm
Chip base: V level
DD
PIN DESCRIPTION and PAD DIMENSIONS
Pad dimensions [µm]
Name
I/O
Description
X
Y
Output state control input. High impedance when LOW (oscillator stops).
Power-saving pull-up resistor built-in.
INHN
I
151
277
XT
XTN
VSS
Q
I
Amplifier input
2ꢀ8
512
588
588
1ꢀ1
1ꢀ1
1ꢀ1
ꢀ45
548
548
Crystal connection pins.
Crystal is connected between XT and XTN.
Amplifier output
O
–
Ground
O
–
Output. Output frequency (f , f /2, f /4, f /8, f /16) determined by internal connection
O
O
O
O
O
VDD
Supply voltage
BLOCK DIAGRAM
VDD VSS
XTN
CG
CD
Rf
1/2
1/2
1/2
1/2
XT
Q
INHN
INHN = LOW active
SEIKO NPC CORPORATION —2
NPC [ NIPPON PRECISION CIRCUITS INC ]
