NJM3517
DIR — Direction
DIR determines in which direction steps will be taken. Actual direction depends on motor and motor connections.
DIR can be changed at any time, but not simultaneously with STEP, see timing diagram, figure 6.
HSM determines whether the motor will be controlled in full-step or half-step mode. When pulled low, a step-
pulse will correspond to a half step of the motor. HSM can be changed at any time, but not simultaneously with
STEP, see timing diagram, figure 6.
INH — Inhibit
A HIGH level on the INH input,turns off all phase outputs to reduce current consumption.
■ RESET
An internal Power-On Reset circuit connected to Vcc resets the phase logic and inhibits the outputs during power
up, to prevent false stepping.
■ OUTPUT STAGES
The output stage consists of four open-collector transistors. The second high-voltage supply contains Darlington
transistors.
■ PHASE OUTPUT
The phase outputs are connected directly to the motor as shown in figure 3.
■ BI-LEVEL TECHNIQUE
The bi-level pulse generator consists of two monostables with a common RC network.
The internal phase logic generates a trigger pulse every time the phase changes state. The pulse triggers its own
monostable which turns on the output transistors for a precise period of time:
tOn = 0.55 • CT • RT.
See pulse diagrams, figures 7 through 11.
■ BIPOLAR PHASE LOGIC OUTPUT
The ØA and ØB outputs are generated from the phase logic and inform an external device if the A phase or the B
phase current is internally inhibited. These outputs are intended to support if it is legal to correctly go from a half-
step mode to a full-step mode without loosing positional information.
The NJM3517 can act as a controller IC for 2 driver ICs, the NJM3770A. Use PA1 and PB1 for phase control, and
ØA and ØB for I0 and I1 control of current turnoff.
NJRC [ NEW JAPAN RADIO ]
