NJM3517
RExt
VZ
R
i
Figure 14. Zener diode turn-off circuit
Figure 12. Diode turn-off circuit
Figure 13. Resistance turn-off circuit
V
V
2
C
1
S
0V
Power supply
Figure 15. Power return turn-off circuit
Figure 16. Power return turn-off circuit
for bi-level
■ INPUT AND OUTPUT SIGNALS FOR DIFFERENT DRIVE MODES
The pulse diagrams, figures 7 through 10, show the necessary input signals and the resulting output signals for
each drive mode.
On the left side are the input and output signals, the next column shows the state of each signal at the cursor
position marked “C.”
STEP is shown with a 50% duty cycle, but can, of course, be with any duty cycle, as long as pulse time (tp) is
within specifications.
P and P are displayed with low level, showing current sinking.
LAA and LBBare displayed with high level, showing current sourcing.
■ USER HINTS
1. Never disconnect ICs or PC-boards when power is supplied.
2. If second supply is not used, disconnect and leave open VSS, LA, LB, and RC. Preferably replace the VMM supply
diodes (D1, D2) with a straight connection.
3. Remember that excessive voltages might be generated by the motor, even though clamping diodes are used.
4. Choice of motor. Choose a motor that is rated for the current you need to establish desired torque. A high
supply voltage will gain better stepping performance. If the motor is not specified for the VMM voltage, a current
limiting resistor will be necessary to connect in series with center tap. This changes the L/R time constant.
5. Never use LA or LB for continuous output at high currents. LA and L on-time can be altered by changing the RC
net. An alternative is to trigger the mono-flip-flop by taking a STEPBand then externally pulling the RC pin
(12Pin) low (0V) for the desired on-time.
6. Avoid VMM and VSS power supplies with serial diodes (without filter capacitor) and/or common ground with VCC.
The common place for ground should be as close as possible to the IC’s ground pin (pin 3).
NJRC [ NEW JAPAN RADIO ]
