74LVC74A-Q100
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
5.2 Pin description
Table 2.
Symbol
1RD, 2RD
1D, 2D
1CP, 2CP
1SD, 2SD
1Q, 2Q
1Q, 2Q
GND
Pin description
Pin
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
7
Description
asynchronous reset-direct input (active LOW)
data input
clock input (LOW-to-HIGH, edge-triggered)
asynchronous set-direct input (active LOW)
true output
complement output
ground (0 V)
VCC
14
supply voltage
6. Functional description
Table 3.
Function table[1]
Input
nSD
L
Output
nRD
H
nCP
X
nD
X
nQ
H
nQ
L
H
L
X
X
L
H
L
L
X
X
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
Table 4.
Input
nSD
H
Function table[1]
Output
nRD
H
nCP
nD
L
nQn+1
nQn+1
L
H
L
H
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level; = LOW-to-HIGH transition; Qn+1 = state after the next LOW-to-HIGH CP transition;
X = don’t care
74LVC74A_Q100
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Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 5 April 2013
4 of 18
NEXPERIA [ Nexperia ]
