74HC4511; 74HCT4511
Nexperia
BCD to 7-segment latch/decoder/driver
W
:
9
,
ꢁꢆꢋꢎ
QHJDWLYHꢋ
SXOVH
9
9
9
0
0
0
ꢂꢆꢋꢎ
ꢆꢋ9
W
W
U
I
W
W
U
I
9
,
ꢁꢆꢋꢎ
SRVLWLYHꢋ
SXOVH
9
0
ꢂꢆꢋꢎ
ꢆꢋ9
W
:
9
9
&&
&&
9
,
9
2
ꢋ
5
/
6ꢂ
*
RSHQ
'87
5
7
&
/
ꢁꢁꢇDDGꢆꢊꢈ
Test data is given in Table 9.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Fig 12. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
Load
S1 position
tPHL, tPLH
open
VI
tr, tf
6 ns
6 ns
CL
RL
74HC4511
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 k
1 k
74HCT4511
open
74HC_HCT4511
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 15 November 2016
12 of 18